The invention relates generally to computer storage systems, and, in particular, it relates to a controller for two or more serial memories, such as disks, with perhaps different characteristics and using an I/O cache.
Computer systems typically include a peripheral serial memory for the storage of large amounts of data and perhaps programs. There are various types of serial memory and two of the most popular are a hard disk and a floppy disk, also called a diskette. A hard disk typically stores relatively large amounts of data with a typical storage capacity in the range of 15 to 30 megabytes. Although the access time to a hard disk is relatively long compared to semiconductor memory, its access time is usually much faster than other types of magnetic disks. However, a hard disk suffers the disadvantages of high cost, bulk and difficulty of transporting the hard disk between installations. A floppy disk has different and complementary characteristics. Its capacity is relatively low, with 1.2 megabytes being a typical value, and its access time is typically longer than that for a hard disk. However, both the floppy disk and the diskette drive are relatively inexpensive and compact and the diskettes are easily stored and transported. As a result, it is often advantageous to include both a hard disk and a diskette in the same computer system. Other types of serial memories can be used in computer systems and representative examples are optical disks, cassettes, tapes, bubble memories and charge coupled devices, each with disparate characteristics.
A problem common to almost all serial memories is their slow access times compared to semiconductor random access memories (RAM). The timing problem is composed of two parts. The clocking of the serial memory is typically at a different rate from that of the data bus of the computer and is typically much slower. A more fundamental problem derives from the serial nature of serial storage. Unlike RAM, a finite time is required to get the data in the serial memory arranged for the reading operation. In the case of a disk, data is stored on parallel tracks and a reading head is mechanically moved to the requested track. If the requested track is different from the track over which the reading head is currently positioned, a relatively long seek time is required for the mechanical movement of the head. Once the reading head is correctly positioned, the constantly spinning disk has to rotate to the requested sector of the disk, a so-called rotational latency. On the average, the rotational latency is one half of the disk rotation period. Thus, both a seek time and a rotational latency elapse after the beginning of an access before data begins to be read. The result is that serial memory very often slows the operation of the much faster CPU.
One method of reducing the slow serial memory access times on computer throughput has been described by Dixon et al in U.S. patent application, Ser. No. 270,951, filed June 5, 1981, now U.S. Pat. No. 4,490,782, and by Marazas et al in U.S. patent application Ser. No. 270,750, filed June 5, 1981, now U.S. Pat. No. 4,489,378. Dixon et al and Marazas et al disclose the use of an I/O cache associated with a serial memory. Whenever a record is requested from the serial memory, several neighboring records are also read into the I/O cache. A cache controller keeps track of the contents of the I/O cache. If a subsequent request is made by the CPU for one of these neighboring records, the cache controller determines its presence in the cache memory and immediately supplies the data to the CPU without the need for an access to the much slower magnetic disk. The cache memory operates at semiconductor speeds rather than at the mechanical speed of the disk, whether the disk be a hard disk or diskette. The utility of a I/O cache derives from the fact that there is a high probability that consecutive requests to a memory will be for data stored in nearby locations.
The I/O cache controller of Dixon et al can be used with multiple disks. This multiple use is desirable because the controller is relatively complex and only one disk is going to be used at any one time. However, Dixon et al disclose no way of using their controller with multiple disks having disparate characteristics. Thus, if a computer system is to include both a hard disk and a diskette, either multiple controllers need to be provided or additional circuitry is required.
The use of a single controller for multiple peripheral devices is disclosed by Kaufman et al in U.S. Pat. No. 4,245,300 and by Cukier et al in a technical article entitled "Bus Speed Adapter" appearing in the IBM Technical Disclosure Bulletin, Vol. 25, No. 35, Aug. 1982, at pp. 1504-1507. A single I/O controller for disparate random access memories is disclosed by Dalmosso in U.S. Pat. No. 4,103,328 and by Struger et al in U.S. Pat. No. 4,293,924.